321 lines
12 KiB
C
Executable file
321 lines
12 KiB
C
Executable file
/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file hal_qspi.h
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* @brief QSPI Driver macros and structures.
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*
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* @addtogroup QSPI
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* @{
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*/
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#ifndef HAL_QSPI_H
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#define HAL_QSPI_H
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#if (HAL_USE_QSPI == TRUE) || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name Transfer options
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* @{
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*/
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#define QSPI_CFG_CMD_MASK (0xFFLU << 0LU)
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#define QSPI_CFG_CMD(n) ((n) << 0LU)
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#define QSPI_CFG_CMD_MODE_MASK (3LU << 8LU)
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#define QSPI_CFG_CMD_MODE_NONE (0LU << 8LU)
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#define QSPI_CFG_CMD_MODE_ONE_LINE (1LU << 8LU)
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#define QSPI_CFG_CMD_MODE_TWO_LINES (2LU << 8LU)
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#define QSPI_CFG_CMD_MODE_FOUR_LINES (3LU << 8LU)
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#define QSPI_CFG_ADDR_MODE_MASK (3LU << 10LU)
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#define QSPI_CFG_ADDR_MODE_NONE (0LU << 10LU)
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#define QSPI_CFG_ADDR_MODE_ONE_LINE (1LU << 10LU)
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#define QSPI_CFG_ADDR_MODE_TWO_LINES (2LU << 10LU)
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#define QSPI_CFG_ADDR_MODE_FOUR_LINES (3LU << 10LU)
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#define QSPI_CFG_ADDR_SIZE_MASK (3LU << 12LU)
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#define QSPI_CFG_ADDR_SIZE_8 (0LU << 12LU)
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#define QSPI_CFG_ADDR_SIZE_16 (1LU << 12LU)
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#define QSPI_CFG_ADDR_SIZE_24 (2LU << 12LU)
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#define QSPI_CFG_ADDR_SIZE_32 (3LU << 12LU)
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#define QSPI_CFG_ALT_MODE_MASK (3LU << 14LU)
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#define QSPI_CFG_ALT_MODE_NONE (0LU << 14LU)
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#define QSPI_CFG_ALT_MODE_ONE_LINE (1LU << 14LU)
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#define QSPI_CFG_ALT_MODE_TWO_LINES (2LU << 14LU)
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#define QSPI_CFG_ALT_MODE_FOUR_LINES (3LU << 14LU)
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#define QSPI_CFG_ALT_SIZE_MASK (3LU << 16LU)
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#define QSPI_CFG_ALT_SIZE_8 (0LU << 16LU)
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#define QSPI_CFG_ALT_SIZE_16 (1LU << 16LU)
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#define QSPI_CFG_ALT_SIZE_24 (2LU << 16LU)
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#define QSPI_CFG_ALT_SIZE_32 (3LU << 16LU)
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#define QSPI_CFG_DUMMY_CYCLES_MASK (0x1FLU << 18LU)
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#define QSPI_CFG_DUMMY_CYCLES(n) ((n) << 18LU)
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#define QSPI_CFG_DATA_MODE_MASK (3LU << 24LU)
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#define QSPI_CFG_DATA_MODE_NONE (0LU << 24LU)
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#define QSPI_CFG_DATA_MODE_ONE_LINE (1LU << 24LU)
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#define QSPI_CFG_DATA_MODE_TWO_LINES (2LU << 24LU)
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#define QSPI_CFG_DATA_MODE_FOUR_LINES (3LU << 24LU)
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#define QSPI_CFG_SIOO (1LU << 28LU)
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#define QSPI_CFG_DDRM (1LU << 31LU)
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name QSPI configuration options
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* @{
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*/
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(QSPI_USE_WAIT) || defined(__DOXYGEN__)
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#define QSPI_USE_WAIT TRUE
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#endif
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/**
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* @brief Enables the @p qspiAcquireBus() and @p qspiReleaseBus() APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(QSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
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#define QSPI_USE_MUTUAL_EXCLUSION TRUE
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Driver state machine possible states.
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*/
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typedef enum {
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QSPI_UNINIT = 0, /**< Not initialized. */
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QSPI_STOP = 1, /**< Stopped. */
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QSPI_READY = 2, /**< Ready. */
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QSPI_ACTIVE = 3, /**< Exchanging data. */
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QSPI_COMPLETE = 4, /**< Asynchronous operation complete. */
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QSPI_MEMMAP = 5 /**< In memory mapped mode. */
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} qspistate_t;
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/**
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* @brief Type of a QSPI command descriptor.
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*/
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typedef struct {
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uint32_t cfg;
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uint32_t addr;
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uint32_t alt;
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} qspi_command_t;
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#include "hal_qspi_lld.h"
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#if !defined(QSPI_SUPPORTS_MEMMAP)
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#error "low level does not define QSPI_SUPPORTS_MEMMAP"
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#endif
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/**
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* @name Macro Functions
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* @{
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*/
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/**
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* @brief Sends a command without data phase.
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* @post At the end of the operation the configured callback is invoked.
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*
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* @param[in] qspip pointer to the @p QSPIDriver object
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* @param[in] cmdp pointer to the command descriptor
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*
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* @iclass
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*/
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#define qspiStartCommandI(qspip, cmdp) { \
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osalDbgAssert(((cmdp)->cfg & QSPI_CFG_DATA_MODE_MASK) == \
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QSPI_CFG_DATA_MODE_NONE, \
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"data mode specified"); \
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(qspip)->state = QSPI_ACTIVE; \
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qspi_lld_command(qspip, cmdp); \
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}
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/**
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* @brief Sends data over the QSPI bus.
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* @details This asynchronous function starts a transmit operation.
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* @post At the end of the operation the configured callback is invoked.
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*
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* @param[in] qspip pointer to the @p QSPIDriver object
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* @param[in] cmdp pointer to the command descriptor
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* @param[in] n number of bytes to send or zero if no data phase
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* @param[in] txbuf the pointer to the transmit buffer
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*
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* @iclass
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*/
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#define qspiStartSendI(qspip, cmdp, n, txbuf) { \
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osalDbgAssert(((cmdp)->cfg & QSPI_CFG_DATA_MODE_MASK) != \
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QSPI_CFG_DATA_MODE_NONE, \
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"data mode required"); \
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(qspip)->state = QSPI_ACTIVE; \
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qspi_lld_send(qspip, cmdp, n, txbuf); \
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}
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/**
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* @brief Receives data from the QSPI bus.
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* @details This asynchronous function starts a receive operation.
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* @post At the end of the operation the configured callback is invoked.
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*
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* @param[in] qspip pointer to the @p QSPIDriver object
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* @param[in] cmdp pointer to the command descriptor
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* @param[in] n number of bytes to receive or zero if no data phase
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* @param[out] rxbuf the pointer to the receive buffer
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*
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* @iclass
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*/
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#define qspiStartReceiveI(qspip, cmdp, n, rxbuf) { \
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osalDbgAssert(((cmdp)->cfg & QSPI_CFG_DATA_MODE_MASK) != \
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QSPI_CFG_DATA_MODE_NONE, \
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"data mode required"); \
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(qspip)->state = QSPI_ACTIVE; \
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qspi_lld_receive(qspip, cmdp, n, rxbuf); \
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}
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#if (QSPI_SUPPORTS_MEMMAP == TRUE) || defined(__DOXYGEN__)
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/**
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* @brief Maps in memory space a QSPI flash device.
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* @pre The memory flash device must be initialized appropriately
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* before mapping it in memory space.
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*
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* @param[in] qspip pointer to the @p QSPIDriver object
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* @param[in] cmdp pointer to the command descriptor
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* @param[out] addrp pointer to the memory start address of the mapped
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* flash or @p NULL
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*
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* @iclass
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*/
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#define qspiMapFlashI(qspip, cmdp, addrp) \
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qspi_lld_map_flash(qspip, cmdp, addrp)
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/**
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* @brief Maps in memory space a QSPI flash device.
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* @post The memory flash device must be re-initialized for normal
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* commands exchange.
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*
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* @param[in] qspip pointer to the @p QSPIDriver object
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*
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* @iclass
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*/
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#define qspiUnmapFlashI(qspip) \
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qspi_lld_unmap_flash(qspip)
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#endif /* QSPI_SUPPORTS_MEMMAP == TRUE */
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/** @} */
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/**
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* @name Low level driver helper macros
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* @{
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*/
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#if (QSPI_USE_WAIT == TRUE) || defined(__DOXYGEN__)
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/**
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* @brief Wakes up the waiting thread.
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*
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* @param[in] qspip pointer to the @p QSPIDriver object
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*
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* @notapi
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*/
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#define _qspi_wakeup_isr(qspip) { \
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osalSysLockFromISR(); \
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osalThreadResumeI(&(qspip)->thread, MSG_OK); \
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osalSysUnlockFromISR(); \
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}
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#else /* !QSPI_USE_WAIT */
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#define _qspi_wakeup_isr(qspip)
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#endif /* !QSPI_USE_WAIT */
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/**
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* @brief Common ISR code.
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* @details This code handles the portable part of the ISR code:
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* - Callback invocation.
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* - Waiting thread wakeup, if any.
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* - Driver state transitions.
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* .
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* @note This macro is meant to be used in the low level drivers
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* implementation only.
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*
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* @param[in] qspip pointer to the @p QSPIDriver object
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*
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* @notapi
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*/
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#define _qspi_isr_code(qspip) { \
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if ((qspip)->config->end_cb) { \
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(qspip)->state = QSPI_COMPLETE; \
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(qspip)->config->end_cb(qspip); \
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if ((qspip)->state == QSPI_COMPLETE) \
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(qspip)->state = QSPI_READY; \
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} \
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else \
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(qspip)->state = QSPI_READY; \
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_qspi_wakeup_isr(qspip); \
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}
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/** @} */
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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void qspiInit(void);
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void qspiObjectInit(QSPIDriver *qspip);
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void qspiStart(QSPIDriver *qspip, const QSPIConfig *config);
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void qspiStop(QSPIDriver *qspip);
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void qspiStartCommand(QSPIDriver *qspip, const qspi_command_t *cmdp);
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void qspiStartSend(QSPIDriver *qspip, const qspi_command_t *cmdp,
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size_t n, const uint8_t *txbuf);
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void qspiStartReceive(QSPIDriver *qspip, const qspi_command_t *cmdp,
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size_t n, uint8_t *rxbuf);
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#if QSPI_USE_WAIT == TRUE
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void qspiCommand(QSPIDriver *qspip, const qspi_command_t *cmdp);
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void qspiSend(QSPIDriver *qspip, const qspi_command_t *cmdp,
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size_t n, const uint8_t *txbuf);
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void qspiReceive(QSPIDriver *qspip, const qspi_command_t *cmdp,
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size_t n, uint8_t *rxbuf);
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#endif
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#if QSPI_SUPPORTS_MEMMAP == TRUE
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void qspiMapFlash(QSPIDriver *qspip,
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const qspi_command_t *cmdp,
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uint8_t **addrp);
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void qspiUnmapFlash(QSPIDriver *qspip);
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#endif
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#if QSPI_USE_MUTUAL_EXCLUSION == TRUE
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void qspiAcquireBus(QSPIDriver *qspip);
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void qspiReleaseBus(QSPIDriver *qspip);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_QSPI == TRUE */
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#endif /* HAL_QSPI_H */
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/** @} */
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